ADIADAU1781低噪音立体声CODEC方案
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ADIADAU1781低噪音立体声CODEC方案  2012/3/1
ADI公司的ADAU1781是低功耗低噪音24位立体声CODEC,低噪音DAC和ADC支持样速率从8kHz到96kHz.具有能向8欧姆负载提供400mW的扬声器放大器,可编程SigmaDSP音频处理器核.模拟喝数字的工作电压为1.8V-3.3V.主要用在数码相机和数码摄影机.本文介绍ADAU1781主要特性,方框图以及多种系统应用电路图,包括差分输入,模拟麦克风输入,单端立体声线输入和立体声数字麦克风输入的系统方框图.TheADAU1781isalowpower,24-bitstereoaudiocodec.Thelown
         ADI公司的 ADAU1781是低功耗低噪音24位立体声CODEC,低噪音DACADC支持样速率从8kHz到96kHz.具有能向8欧姆负载提供400mW的扬声器放大器,可编程SigmaDSP音频处理器核.模拟喝数字的工作电压为1.8V-3.3V.主要用在数码相机和数码摄影机.本文介绍ADAU1781主要特性,方框图以及多种系统应用电路图,包括差分输入, 模拟麦克风输入, 单端立体声线输入和立体声数字麦克风输入的系统方框图.

The ADAU1781 is a lowpower, 24-bit stereo audio codec. The low noise DAC and ADC support sample rates from 8 kHz to 96 kHz. Low current draw and power saving modes make the ADAU1781 ideal for battery-powered audio applications.

A programmable SigmaDSP® core provides enhanced record and playback processing to improve overall audio quality.

The record path includes two digital stereo microphone inputs and an analog stereo input path. The analog inputs can be configured for either a pseudo differential or a single-ended stereo source. A dedicated analog beep input signal can be mixed into any output path. The ADAU1781 includes a stereo line output and speaker driver, which makes the device capable of supporting dynamic speakers.

The serial control bus supports the I2C® or SPI protocols, and the serial audio bus is programmable for I2S, left-justified, right-justified, or TDM mode. A programmable PLL supports flexible clock generation for all standard rates and available master clocks from 11 MHz to 20 MHz.

ADAU1781主要特性:

24-bit stereo audio ADC and DAC

400 mW speaker amplifier (into 8 Ω load)

Programmable SigmaDSP audio processing core

Wind noise detection and filtering

Enhanced stereo capture (ESC)

Dynamics processing

Equalization and filtering

Volume control and mute

Sampling rates from 8 kHz to 96 kHz

Stereo pseudo differential microphone input

Optional stereo digital microphone input pulse-density modulation (PDM)
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